Master Verilog HDL with Practical VLSI Design

About the course

This intensive 8-week course, guided by experts in the field of VLSI, aims to equip students with solid theoretical foundations and rich practical experience in designing, debugging, verifying and optimising digital circuits using Verilog HDL and Xilinx ISE. Over the course duration, students will explore modules, data types, operators and gain an understanding of behavioral and structural models for digital circuits. They will get hands-on experience in designing combinational and sequential logic circuits and develop intricate arithmetic circuits and memory blocks. They will also learn to create efficient finite state machines for practical applications. By designing their own testbenches for functional verification and analysing waveforms and resources, they will understand how to troubleshoot designs effectively. An essential part of the course is dedicated to optimising design for timing, area, and power efficiency. By the end of this course, students will not just be well-versed in Verilog-based design but also gain the confidence and competence to excel in the digital design domain.